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? semiconductor components industries, llc, 2002 february, 2002 rev. 10 1 publication order number: tl431/d tl431, a, b series programmable precision references the tl431, a, b integrated circuits are threeterminal programmable shunt regulator diodes. these monolithic ic voltage references operate as a low temperature coefficient zener which is programmable from v ref to 36 v with two external resistors. these devices exhibit a wide operating current range of 1.0 ma to 100 ma with a typical dynamic impedance of 0.22 w . the characteristics of these references make them excellent replacements for zener diodes in many applications such as digital voltmeters, power supplies, and op amp circuitry. the 2.5 v reference makes it convenient to obtain a stable reference from 5.0 v logic supplies, and since the tl431, a, b operates as a shunt regulator, it can be used as either a positive or negative voltage reference. ? programmable output voltage to 36 v ? voltage reference tolerance: 0.4%, typ @ 25 c (tl431b) ? low dynamic output impedance, 0.22 w typical ? sink current capability of 1.0 ma to 100 ma ? equivalent fullrange temperature coefficient of 50 ppm/ c typical ? temperature compensated for operation over full rated operating temperature range ? low output noise voltage ordering information device operating temperature range package tl431clp, aclp, bclp to92 tl431cp, acp, bcp t 0 to +70 c plastic tl431cdm, acdm, bcdm t a = 0 to +70 c micro8 tl431cd, acd, bcd sop8 tl431ilp, ailp, bilp to92 tl431ip, aip, bip t 40 to +85 c plastic tl431idm, aidm, bidm t a = 40 to +85 c micro8 tl431id, aid, bid sop8 (top view) 3 1 reference n/c n/c n/c 2 4 8 7 6 5 n/c anode n/c cathode anode anode lp suffix plastic package case 29 (to92) p suffix plastic package case 626 d suffix plastic package case 751 (sop8) pin 1. reference 2. anode 3. cathode (top view) 3 1 reference n/c 2 4 8 7 6 5 n/c cathode dm suffix plastic package case 846a (micro8 ) 8 1 8 1 8 1 1 2 3 sop8 is an internally modified so8 package. pins 2, 3, 6 and 7 are electrically common to the die attach flag. this internal lead frame modification decreases power dissipation capability when appropriately mounted on a printed circuit board. sop8 conforms to all external dimensions of the standard so8 package. http://onsemi.com
tl431, a, b series http://onsemi.com 2 representative block diagram 1.0 k cathode (k) 2.5 v ref anode (a) reference (r) 4.0 k 150 symbol 10 k 20 pf 800 cathode (k) 3.28 k representative schematic diagram component values are nominal anode (a) - + anode (a) 800 reference (r) 2.4 k 7.2 k 20 pf 800 cathode (k) reference (r) this device contains 12 active transistors. maximum ratings (full operating ambient temperature range applies, unless otherwise noted.) rating symbol value unit cathode to anode voltage v ka 37 v cathode current range, continuous i k 100 to +150 ma reference input current range, continuous i ref 0.05 to +10 ma operating junction temperature t j 150 c operating ambient temperature range t a c tl431i, tl431ai, tl431bi 40 to +85 tl431c, tl431ac, tl431bc 0 to +70 storage temperature range t stg 65 to +150 c total power dissipation @ t a = 25 c p d w derate above 25 c ambient temperature d, lp suffix plastic package 0.70 p suffix plastic package 1.10 dm suffix plastic package 0.52 total power dissipation @ t c = 25 c p d w derate above 25 c case temperature d, lp suffix plastic package 1.5 p suffix plastic package 3.0 note: esd data available upon request. recommended operating conditions condition symbol min max unit cathode to anode voltage v ka v ref 36 v cathode current i k 1.0 100 ma thermal characteristics characteristic symbol d, lp suffix package p suffix package dm suffix package unit thermal resistance, junctiontoambient r q ja 178 114 240 c/w thermal resistance, junctiontocase r q jc 83 41 c/w
tl431, a, b series http://onsemi.com 3 electrical characteristics (t a = 25 c, unless otherwise noted.) tl431i tl431c characteristic symbol min typ max min typ max unit reference input voltage (figure 1) v ref v v ka = v ref , i k = 10 ma t a = 25 c 2.44 2.495 2.55 2.44 2.495 2.55 t a = t low to t high (note 1) 2.41 2.58 2.423 2.567 reference input voltage deviation over d v ref 7.0 30 3.0 17 mv temperature range (figure 1, notes 1, 2) v ka = v ref, i k = 10 ma ratio of change in reference input voltage v ref mv/v to change in cathode to anode voltage v re f v ka i k = 10 ma (figure 2), v ka d v ka = 10 v to v ref 1.4 2.7 1.4 2.7 d v ka = 36 v to 10 v 1.0 2.0 1.0 2.0 reference input current (figure 2) i ref m a i k = 10 ma, r1 = 10 k, r2 = t a = 25 c 1.8 4.0 1.8 4.0 t a = t low to t high (note 1) 6.5 5.2 reference input current deviation over d i ref 0.8 2.5 0.4 1.2 m a temperature range (figure 2, note 1, 4) i k = 10 ma, r1 = 10 k, r2 = minimum cathode current for regulation i min 0.5 1.0 0.5 1.0 ma v ka = v ref (figure 1) offstate cathode current (figure 3) i off 260 1000 260 1000 na v ka = 36 v, v ref = 0 v dynamic impedance (figure 1, note 3) |z ka | 0.22 0.5 0.22 0.5 w v ka = v ref , d i k = 1.0 ma to 100 ma f 1.0 khz notes: 1. t low = 40 c for tl431aip tl431ailp, tl431ip, tl431ilp, tl431bid, tl431bip, tl431bilp, tl431aidm, tl431idm, tl431bidm =0 c for tl431acp, tl431aclp, tl431cp, tl431clp, tl431cd, tl431acd, tl431bcd, tl431bcp, tl431bclp, tl431cdm, tl431acdm, tl431bcdm t high = +85 c for tl431aip, tl431ailp, tl431ip, tl431ilp, tl431bid, tl431bip, tl431bilp, tl431idm, tl431aidm, tl431bidm = +70 c for tl431acp, tl431aclp, tl431cp, tl431acd, tl431bcd, tl431bcp, tl431bclp, tl431cdm, tl431acdm, tl431bcdm 2. the deviation parameter d v ref is defined as the difference between the maximum and minimum values obtained over the full operating ambient temperature range that applies. d v ref = v ref max -v ref min d t a = t 2 - t 1 t2 ambient temperature t1 v ref min v ref max the average temperature coefficient of the reference input voltage, a v ref is defined as: v ref ppm c v ref v ref @25 c x10 6 t a v ref x10 6 t a (v ref @25 c) a v ref can be positive or negative depending on whether v ref min or v ref max occurs at the lower ambient temperature. (refer to figure 6.) example : v ref 8.0 mv and slope is positive, v ref @25 c 2.495 v, t a 70 c v ref 0.008 x 10 6 70 (2.495) 45.8 ppm c 3. the dynamic impedance z ka is defined as |z ka | v ka i k when the device is programmed with two external resistors, r1 and r2, (refer to figure 2) the total dynamic impedance of the ci rcuit is defined as: |z ka | |z ka | 1 r1 r2
tl431, a, b series http://onsemi.com 4 electrical characteristics (t a = 25 c, unless otherwise noted.) tl431ai tl431ac tl431bi characteristic symbol min typ max min typ max min typ max unit reference input voltage (figure 1) v ref v v ka = v ref , i k = 10 ma t a = 25 c 2.47 2.495 2.52 2.47 2.495 2.52 2.483 2.495 2.507 t a = t low to t high 2.44 2.55 2.453 2.537 2.475 2.495 2.515 reference input voltage deviation over d v ref 7.0 30 3.0 17 3.0 17 mv temperature range (figure 1, notes 1, 2) v ka = v ref, i k = 10 ma ratio of change in reference input voltage v ref mv/v to change in cathode to anode voltage v re f v ka i k = 10 ma (figure 2), v ka d v ka = 10 v to v ref 1.4 2.7 1.4 2.7 1.4 2.7 d v ka = 36 v to 10 v 1.0 2.0 1.0 2.0 1.0 2.0 reference input current (figure 2) i ref m a i k = 10 ma, r1 = 10 k, r2 = t a = 25 c 1.8 4.0 1.8 4.0 1.1 2.0 t a = t low to t high (note 1) 6.5 5.2 4.0 reference input current deviation over d i ref 0.8 2.5 0.4 1.2 0.8 2.5 m a temperature range (figure 2, note 1) i k = 10 ma, r1 = 10 k, r2 = minimum cathode current for regulation i min 0.5 1.0 0.5 1.0 0.5 1.0 ma v ka = v ref (figure 1) offstate cathode current (figure 3) i off 260 1000 260 1000 230 500 na v ka = 36 v, v ref = 0 v dynamic impedance (figure 1, note 3) |z ka | 0.22 0.5 0.22 0.5 0.14 0.3 w v ka = v ref , d i k = 1.0 ma to 100 ma f 1.0 khz notes: 1. t low = 40 c for tl431aip tl431ailp, tl431ip, tl431ilp, tl431bid, tl431bip, tl431bilp, tl431aidm, tl431idm, tl431bidm =0 c for tl431acp, tl431aclp, tl431cp, tl431clp, tl431cd, tl431acd, tl431bcd, tl431bcp, tl431bclp, tl431cdm, tl431acdm, tl431bcdm t high = +85 c for tl431aip, tl431ailp, tl431ip, tl431ilp, tl431bid, tl431bip, tl431bilp, tl431idm, tl431aidm, tl431bidm = +70 c for tl431acp, tl431aclp, tl431cp, tl431acd, tl431bcd, tl431bcp, tl431bclp, tl431cdm, tl431acdm, tl431bcdm 2. the deviation parameter d v ref is defined as the difference between the maximum and minimum values obtained over the full operating ambient temperature range that applies. d v ref = v ref max -v ref min d t a = t 2 - t 1 t2 ambient temperature t1 v ref min v ref max the average temperature coefficient of the reference input voltage, a v ref is defined as: v ref ppm c v ref v ref @25 c x10 6 t a v ref x10 6 t a (v ref @25 c) a v ref can be positive or negative depending on whether v ref min or v ref max occurs at the lower ambient temperature. (refer to figure 6.) example : v ref 8.0 mv and slope is positive, v ref @25 c 2.495 v, t a 70 c v ref 0.008 x 10 6 70 (2.495) 45.8 ppm c 3. the dynamic impedance z ka is defined as |z ka | v ka i k when the device is programmed with two external resistors, r1 and r2, (refer to figure 2) the total dynamic impedance of the ci rcuit is defined as: |z ka | |z ka | 1 r1 r2
tl431, a, b series http://onsemi.com 5 i k v ref v ka input figure 1. test circuit for v ka = v ref input i k r2 i ref v ref v ka r1 figure 2. test circuit for v ka > v ref v ka v ref 1 r1 r2 i ref r1 i off input v ka figure 3. test circuit for i off -1.0 i min 200 400 v ka , cathode voltage (v) -200 0 0 1.0 2.0 3.0 800 600 -2.0 -1.0 0 -100 1.0 2.0 3.0 150 50 v ka , cathode voltage (v) 0 -50 figure 4. cathode current versus cathode voltage figure 5. cathode current versus cathode voltage input 100 v ka = v ref t a = 25 c i k v ka i k , cathode current (ma) i k , cathode current ( a) m 125 t a , ambient temperature ( c) 3.0 100 50 75 -55 0 2.5 0.5 2.0 1.0 25 0 -25 1.5 2600 2580 2560 2540 2520 2500 2480 2460 v ka = v ref i k = 10 ma t a , ambient temperature ( c) v ka i k -55 input v ref 75 100 125 2440 050 figure 6. reference input voltage versus ambient temperature figure 7. reference input current versus ambient temperature 2420 2400 25 -25 input i k i k = 10 ma i ref 10k v ka ref v , reference input voltage (mv) i ref , reference input current ( a) m v ref max = 2550 mv v ref typ = 2495 mv v ref min = 2440 mv v ka = v ref t a = 25 c input v ka i k
tl431, a, b series http://onsemi.com 6 noise voltage (nv/ hz) -55 f, frequency (mhz) 100 10 1.0 100 k 10 m 1.0 m 1.0 k 10 k 0.1 75 -25 0 25 50 100 125 t a , ambient temperature ( c) 0.200 0.220 0.240 0.300 0.320 0.260 0.280 i k 50 - 1.0 k + output gnd output gnd i k 50 - 1.0k + v ka = v ref d i k = 1.0 ma to 100 ma f 1.0 khz t a = 25 c d i k = 1.0 ma to 100 ma |z ka w |, dynamic impedance ( ) |z ka w |, dynamic impedance ( ) f, frequency (hz) 40 10 10 k 1.0 k 100 0 20 100 k 60 f, frequency (mhz) 100 k 0 10 m 1.0 m -10 10 20 30 60 50 40 1.0 k 10 k v ka = v ref i k = 10 ma t a = 25 c i k output input 80 , open loop voltage gain (db) 230 gnd output i k 9.0 m f 8.25k 15k i k = 10 ma t a = 25 c -55 0.01 100 10 1.0 0.1 t a , ambient temperature (5c) 75 -25 0 25 50 100 125 40 1.0 k v ka , cathode voltage (v) 30 10 0 -32 -8.0 -16 20 0 -24 r2 v ref r1 i k input v ka input i off v ka = 36 v v ref = 0 v v ka v ref , reference input voltage (mv) d i off , off-state cathode current (na) i k = 10 ma t a = 25 c figure 8. change in reference input voltage versus cathode voltage figure 9. offstate cathode current versus ambient temperature figure 10. dynamic impedance versus frequency figure 11. dynamic impedance versus ambient temperature figure 12. openloop voltage gain versus frequency figure 13. spectral noise density vol a
tl431, a, b series http://onsemi.com 7 input output t, time ( m s) pulse generator f = 100 khz 0 8.0 4.0 20 0 16 2.0 3.0 12 0 1.0 5.0 figure 14. pulse response figure 15. stability boundary conditions 50 220 output gnd input monitor t a = 25 c voltage swing (v) t a = 25 c c a b c l , load capacitance 120 80 100 60 0 i k , cathode current (ma) 140 1.0 nf 100 f 1.0 f 10 f stable stable 40 20 10 nf 100 nf a b d unstable area programmed v ka (v) a b c d v ref 5.0 10 15 figure 16. test circuit for curve a of stability boundary conditions figure 17. test circuit for curves b, c, and d of stability boundary conditions v+ i k 150 i k v+ 150 c l 10 k c l figure 18. shunt regulator figure 19. high current shunt regulator v+ v out r1 v+ v out r1 r2 r2 v out 1 r1 r2 v ref v out 1 r1 r2 v ref typical applications
tl431, a, b series http://onsemi.com 8 figure 20. output control for a threeterminal fixed regulator figure 21. series pass regulator v+ v out r1 r2 out in mc7805 v+ v out r2 common r1 v out 1 r1 r2 v ref v out min v ref 5.0v v out 1 r1 r2 v ref v out min v ref v be figure 22. constant current source figure 23. constant current sink v+ r cl i out v+ r s i sink v ref r s i out v ref r cl i sink figure 24. triac crowbar figure 25. src crowbar v out v+ r2 v+ v out r1 r2 r1 v out(trip) 1 r1 r2 v ref v out(trip) 1 r1 r2 v ref
tl431, a, b series http://onsemi.com 9 figure 26. voltage monitor figure 27. singlesupply comparator with temperaturecompensated threshold v th = v ref v+ v out v in r1 r3 v+ v out r2 r4 l l.e.d. indicator is `on' when v+ is between the upper and lower limits. lowerlimit 1 r1 r2 v ref upperlimit 1 r3 r4 v ref v in v out < v ref v+ > v ref 2.0 v figure 28. linear ohmmeter figure 29. simple 400 mw phono amplifier *thermalloy * thm 6024 * heatsink on * lp package * t l = 330 to 8.0 w 8.0 w + - lm11 2.0 ma 25 v 25 v -5.0 v v out range v 1.0 m w v 100 k w v v 1.0 k w r x 5.0 m 1% 500 k 1% 50 k 1% 5.0 k 1% 47 k tone 0.05 m f 470 m f volume 1n5305 1.0 m f t i 360 k 330 56 k 10 k 25 k 38 v + 10 k w 10 k calibrate r x v out v range
tl431, a, b series http://onsemi.com 10 figure 30. high efficiency stepdown switching converter 150 h @ 2.0 a 1n5823 0.01 m f + 470 m f 51 k 0.1 m f + 2200 m f 4.7 k v in = 10 v to 20 v tip115 mpsa20 1.0 k 4.7 k 4.7 k 10 2.2 k 100 k v out = 5.0 v i out = 1.0 a test conditions results line regulation v in = 10 v to 20 v, i o = 1.0 a 53 mv (1.1%) load regulation v in = 15 v, i o = 0 a to 1.0 a 25 mv (0.5%) output ripple v in = 10 v, i o = 1.0 a 50 mvpp p.a.r.d. output ripple v in = 20 v, i o = 1.0 a 100 mvpp p.a.r.d. efficiency v in = 15 v, i o = 1.0 a 82%
tl431, a, b series http://onsemi.com 11 applications information the tl431 is a programmable precision reference which is used in a variety of ways. it serves as a reference voltage in circuits where a nonstandard reference voltage is needed. other uses include feedback control for driving an optocoupler in power supplies, voltage monitor, constant current source, constant current sink and series pass regulator. in each of these applications, it is critical to maintain stability of the device at various operating currents and load capacitances. in some cases the circuit designer can estimate the stabilization capacitance from the stability boundary conditions curve provided in figure 15. however, these typical curves only provide stability information at specific cathode voltages and at a specific load condition. additional information is needed to determine the capacitance needed to optimize phase margin or allow for process variation. a simplified model of the tl431 is shown in figure 31. when tested for stability boundaries, the load resistance is 150 . the model reference input consists of an input transistor and a dc emitter resistance connected to the device anode. a dependent current source, gm, develops a current whose amplitude is determined by the difference between the 1.78 v internal reference voltage source and the input transistor emitter voltage. a portion of gm flows through compensation capacitance, c p2 . the voltage across c p2 drives the output dependent current source, go, which is connected across the device cathode and anode. model component values are: v ref = 1.78 v gm = 0.3 + 2.7 exp (i c /26 ma) where i c is the device cathode current and gm is in mhos go = 1.25 (v cp 2) m mhos. resistor and capacitor typical values are shown on the model. process tolerances are 20% for resistors, 10% for capacitors, and 40% for transconductances. an examination of the device model reveals the location of circuit poles and zeroes: p1 1 2 r gm c p1 1 2 * 1.0 m * 20 pf 7.96 khz p2 1 2 r p2 c p2 1 2 * 10 m * 0.265 pf 60 khz z1 1 2 r z1 c p1 1 2 *15.9k*20pf 500 khz in addition, there is an external circuit pole defined by the load: p l 1 2 r l c l also, the transfer dc voltage gain of the tl431 is: g g m r gm gor l example 1: i c 10 ma, r l 230 ,c l 0. define the transfer gain . the dc gain is: g g m r gm gor l (2.138)(1.0 m)(1.25 )(230) 615 56 db loop gain g 8.25 k 8.25 k 15 k 218 47 db the resulting transfer function bode plot is shown in figure 32. the asymptotic plot may be expressed as the following equation: av 615 1 jf 500 khz 1 jf 8.0 khz 1 jf 60 khz the bode plot shows a unity gain crossover frequency of approximately 600 khz. the phase margin, calculated from the equation, would be 55.9 degrees. this model matches the openloop bode plot of figure 12. the total loop would have a unity gain frequency of about 300 khz with a phase margin of about 44 degrees.
tl431, a, b series http://onsemi.com 12 figure 31. simplified tl431 device model + r l v cc - c l 15 k 9.0 f input 8.25 k 3 cathode 500 k v ref 1.78 v r ref 16 g m anode 2 r gm 1.0 m ref 1 go 1.0 mho c p2 0.265 pf r p2 10 m r z1 15.9 k c p1 20 pf f, frequency (hz) 10 2 10 1 -20 30 20 60 0 av, open-loop voltage gain (db) figure 32. example 1 circuit open loop gain plot tl431 open-loop voltage gain versus frequency 40 10 4 10 3 10 7 10 5 10 6 10 -10 50 example 2. i c = 7.5 ma, r l = 2.2 k , c l = 0.01 f. cathode tied to reference input pin. an examination of the data sheet stability boundary curve (figure 15) shows that this value of load capacitance and cathode current is on the boundary. define the transfer gain. the dc gain is: g g m r gm gor l (2.323)(1.0 m)(1.25 )(2200) 6389 76 db the resulting open loop bode plot is shown in figure 33. the asymptotic plot may be expressed as the following equation: av 615 1 jf 500 khz 1 jf 8.0 khz 1 jf 60 khz 1 jf 7.2 khz note that the transfer function now has an extra pole formed by the load capacitance and load resistance. note that the crossover frequency in this case is about 250 khz, having a phase margin of about 46 degrees. therefore, instability of this circuit is likely. f, frequency (hz) 10 2 10 1 -20 40 20 80 0 av, open-loop gain (db) figure 33. example 2 circuit open loop gain plot tl431 open-loop bode plot with load cap 60 10 4 10 3 10 6 10 5 with three poles, this system is unstable. the only hope for stabilizing this circuit is to add a zero. however, that can only be done by adding a series resistance to the output capacitance, which will reduce its effectiveness as a noise filter. therefore, practically, in reference voltage applications, the best solution appears to be to use a smaller value of capacitance in low noise applications or a very large value to provide noise filtering and a dominant pole rolloff of the system.
tl431, a, b series http://onsemi.com 13 package dimensions lp suffix plastic package case 2911 (to92) issue al notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. contour of package beyond dimension r is uncontrolled. 4. lead dimension is uncontrolled in p and beyond dimension k minimum. r a p j l b k g h section xx c v d n n xx seating plane dim min max min max millimeters inches a 0.175 0.205 4.45 5.20 b 0.170 0.210 4.32 5.33 c 0.125 0.165 3.18 4.19 d 0.016 0.021 0.407 0.533 g 0.045 0.055 1.15 1.39 h 0.095 0.105 2.42 2.66 j 0.015 0.020 0.39 0.50 k 0.500 --- 12.70 --- l 0.250 --- 6.35 --- n 0.080 0.105 2.04 2.66 p --- 0.100 --- 2.54 r 0.115 --- 2.93 --- v 0.135 --- 3.43 --- 1 p suffix plastic package case 62605 issue l notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 a b t seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040
tl431, a, b series http://onsemi.com 14 package dimensions dm suffix plastic package case 846a02 (micro8) issue e s b m 0.08 (0.003) a s t dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c --- 1.10 --- 0.043 d 0.25 0.40 0.010 0.016 g 0.65 bsc 0.026 bsc h 0.05 0.15 0.002 0.006 j 0.13 0.23 0.005 0.009 k 4.75 5.05 0.187 0.199 l 0.40 0.70 0.016 0.028 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. b a d k g pin 1 id 8 pl 0.038 (0.0015) t seating plane c h j l d suffix plastic package case 75107 (sop8) issue w seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m
tl431, a, b series http://onsemi.com 15 notes
tl431, a, b series http://onsemi.com 16 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. tl431/d micro8 is a trademark of international rectifier. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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